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mlrit1222
Ravinder Tirupati
Associate Professor
8 Years
ECE
ravindertirupati@gmail.com
9704676717
98150404-144949

VLSI SYSTEM DESIGN

B. Tech
M.Tech (VLSI Systems)
-
1. CS
2. VLSI DESIGN
3. SS
4. STLD
5. DDUV(VERILOG)
6. EDC
7. PDC
8. DSD
9. CPLD & FPGA ARCHITECTURE
10. LOW POWER VLSI

Journal Publications:

1.  Ravinder, T., Vijetha, T., Shaker, P.C., Neelima, C., Karthik, R., “Design of 8T SRAM using FINFET technology”, (2019) International Journal of Recent Technology and Engineering, 7 (5), pp. 74-76.

2.  Naresh Kumar, D., Arun, V., Ravinder, T., Nagarjuna, T., “A novel approach for image integrity protection on FPGA”, (2018) Journal of Advanced Research in Dynamical and Control Systems, 10 (3 Special Issue), pp. 1238-1241.

3.  Arun, V., Naresh Kumar, D., Ravinder, T., Karthik, R., Kassa, S.R., Nagarjuna, T., “An implementation of high-speed digital reconfigurable FIR filter using low power carry look ahead adder-review”, (2018) Journal of Advanced Research in Dynamical and Control Systems, 10 (3 Special Issue), pp. 1217-1221.

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